Un solo apunte los Amd llevan si llevan SSE4 pero se denomina SSE4A (Una actualizacion leve) nada que ver con la implementacion de intel con SSE4.1/SSE4.2 (Aunque la mas relevante de intel es SSE4.1 (la SSE4.2 solo añade unos añadidos más) Otro cosa es que para quien no haga nada en especial o uso de estas instrucciones y ni OC pos le saldrá mejor AMD Por precio Pero si quieres ese Rendimiento Extra para aplicaciones que hagan buen uso de estas instrucciones no te queda otra que intel (Sobre todo para equipos High end y si te lo puedes permitir pues merece la pena)
Instruccion SSE4.1 (Tiene una implementacion que es importante para videos HDTV y optimizaciones que si se utilizan sacan rendimiento cada una esta ubicada a cierto tipo de calculo)
MPSADBW Compute eight offset sums of absolute differences (i.e. |x0-y0|+|x1-y1|+|x2-y2|+|x3-y3|, |x0-y1|+|x1-y2|+|x2-y3|+|x3-y4|, ...); this operation is extremely important for modern HDTV codecs, and (see [5]) allows an 8x8 block difference to be computed in fewer than seven cycles. One bit of a three-bit immediate operand indicates whether y0 .. y10 or y4 .. y14 should be used from the destination operand, the other two whether x0..x3, x4..x7, x8..x11 or x12..x15 should be used from the source.
PHMINPOSUW Sets the bottom unsigned 16-bit word of the destination to the smallest unsigned 16-bit word in the source, and the next-from-bottom to the index of that word in the source.
PMULDQ Packed signed multiplication on two sets of 2 out of 4 packed integers, the 1st and 3rd per packed 4, giving 2 packed 64-bit results.
PMULLD Packed signed multiplication, 4 packed sets of 32-bit integers multiplied to give 4 packed 32-bit results.
DPPS, DPPD Dot product for AOS (Array of Structs) data. This takes an immediate operand consisting of four (or two for DPPD) bits to select which of the entries in the input to multiply and accumulate, and another four (or two for DPPD) to select whether to put 0 or the dot-product in the appropriate field of the output.
BLENDPS, BLENDPD, BLENDVPS, BLENDVPD, PBLENDVB, PBLENDW Conditional copying of elements in one location with another, based (for non-V form) on the bits in an immediate operand, and (for V form) on the bits in register XMM0.
PMINSB, PMAXSB, PMINUW, PMAXUW, PMINUD, PMAXUD, PMINSD, PMAXSD Packed minimum/maximum for different integer operand types
ROUNDPS, ROUNDSS, ROUNDPD, ROUNDSD Round values in a floating-point register to integers, using one of four rounding modes specified by an immediate operand
INSERTPS, PINSRB, PINSRD/PINSRQ, EXTRACTPS, PEXTRB, PEXTRW, PEXTRD/PEXTRQ The INSERTPS and PINSR instructions read 8, 16 or 32 bits from an x86 register memory location and insert it into a field in the destination register given by an immediate operand, EXTRACTPS and PEXTR read a field from the source register and insert it into an x86 register or memory location. For example, PEXTRD eax, [xmm0], 1; EXTRACTPS [addr+4*eax], xmm1, 1 stores the first field of xmm1 in the address given by the first field of xmm0.
PMOVSXBW, PMOVZXBW, PMOVSXBD, PMOVZXBD, PMOVSXBQ, PMOVZXBQ, PMOVSXWD, PMOVZXWD, PMOVSXWQ, PMOVZXWQ, PMOVSXDQ, PMOVZXDQ Packed sign/zero extension to wider types
PTEST This is similar to the TEST instruction, in that it sets the Z flag to the result of an AND between its operators: ZF is set, if DEST AND SRC is equal to 0. Additionally it sets the C flag to the result of a (NOT DEST) AND SRC.
This comes down to setting the Z flag if none of the bits matched, and the C flag if all of the bits in SRC did match, a shortcut for DEST AND SRC is equal to SRC.
PCMPEQQ Quadword (64 bits) compare for equality
PACKUSDW Convert signed DWORDs into unsigned WORDs with saturation.
MOVNTDQA Efficient read from write-combining memory area into SSE register; this is useful for retrieving results from peripherals attached to the memory bus.
CRC32 Accumulate CRC32C value using the polynomial 0x11EDC6F41 (or, without the high order bit, 0x1EDC6F41).[6]
PCMPESTRI Packed Compare Explicit Length Strings, Return Index
PCMPESTRM Packed Compare Explicit Length Strings, Return Mask
PCMPISTRI Packed Compare Implicit Length Strings, Return Index
PCMPISTRM Packed Compare Implicit Length Strings, Return Mask
PCMPGTQ Compare Packed Signed 64-bit data For Greater Than
POPCNT Population count (count number of bits set to 1). POPCNT instruction may also be implemented in some processors that do not support the other SSE4 instructions and a separate bit can be tested to confirm POPCNT presence.
![[plas]](/images/smilies/aplauso.gif "Aplausos")
