Intel desvela su nueva familia de microprocesadores

Harl escribió:Algo se ha comentado ya en este hilo:

http://www.elotrolado.net/showthread.php?s=&threadid=442218

http://www.anandtech.com/tradeshows/showdoc.aspx?i=2504
http://www.anandtech.com/tradeshows/showdoc.aspx?i=2505
http://www.tomshardware.com/hardnews/20050824_020229.html
http://www.tomshardware.com/hardnews/20050824_111013.html

Yo despues de ver el ultimo no tengo muy claro que van ha hacer.
Lo mismo se van a centrar solo en mejorar la relación
rendimiento/vatio (lo que tampoco estaria mal)

Bueno ya veremos que tal van.

# The design philosophy for the company's next-generation Pentium architecture -- which still lacks an official name -- is entirely new, Smith said. Although its inspiration was the cooler, more efficient Pentium M architecture developed by Intel's Israel Design Center, he said the new architecture is not directly derived from any previous project.
# Expect to see very modest performance gains over the lifetime of Merom/Conroe/Woodcrest. Speed is no longer key.
# Contrary to reports yesterday, hyperthreading is not dead, if you consider life support as "alive." The role of HT in Intel architectures going forward will be diminished somewhat. Expect to see HT as a feature of CPUs in the server space and high-end, said Smith, but certainly not for notebooks.
# L2 cache size may become the key distinguishing factor for raw performance going forth, said Smith. Yesterday, Intel CEO Paul Otellini, in his keynote address to IDF, characterizing the new "performance-per-watt" figure would be the principal variable distinguishing the performance of future CPUs, replacing the traditional megahertz value. But Smith's comment today touting L2 size as the key factor, may indicate that Intel has yet to formalize a new "power scale" strategy to replace megahertz. While Smith could not confirm the specific L2 cache size for Conroe processors, he did not deny the possibility of an 8 Mb L2 cache -- a figure previously reported in Tom's