Intel dice adios al modelo Tick-Tock. ¿Hola Tick-Tock-Tock?

intel escribió:As part of our R&D efforts, we plan to introduce a new Intel Core microarchitecture for desktops, notebooks (including Ultrabook devices and 2 in 1 systems), and Intel Xeon processors on a regular cadence. We expect to lengthen the amount of time we will utilize our 14nm and our next- generation 10nm process technologies, further optimizing our products and process technologies while meeting the yearly market cadence for product introductions.

Advances in our silicon technology have enabled us to continue making Moore’s Law a reality. In 2014, we began manufacturing our 5th generation Intel Core processor family using our 14nm process technology. In 2015, we released a new microarchitecture (our 6th generation Intel Core processor family), using our 14nm process technology. We also plan to introduce a third 14nm product, code-named "Kaby Lake." This product will have key performance enhancements as compared to our 6th generation Intel Core processor family. We are also developing 10nm manufacturing process technology, our next-generation process technology.

We have continued expanding on the advances anticipated by Moore’s Law by bringing new capabilities into silicon and producing new products optimized for a wider variety of applications. We expect these advances will result in a significant reduction in transistor leakage, lower active power, and an increase in transistor density to enable more smaller form factors, such as powerful, feature-rich phones and tablets with a longer battery life. For instance, we have accelerated the Intel Atom processor-based SoC roadmap for our mobile form factors (including tablets and phones), notebooks (including Ultrabook devices and 2 in 1 systems), the Internet of Things, and data center applications, on our 32nm, 22nm, and 14nm process technologies. In addition, we offer the Intel Quark SoC, an ultra-low-power and low-cost architecture designed for the Internet of Things such as industrial machines and wearable devices.

With our continued focus on silicon and manufacturing technology leadership, we entered into a series of agreements with ASML Holding N.V. (ASML) in 2012, certain of which were amended in 2014 to further define the commercial terms between the parties. These amended agreements, in which Intel agreed to provide R&D funding over five years, are intended to accelerate the development of extreme ultraviolet (EUV) lithography projects and deep ultraviolet immersion lithography projects, including generic developments applicable to both 300mm and 450mm.


As node transitions lengthened, we adapted our approach to the Tick-Tock method, which gave us a second product on each node. This strategy created better products for our customers and a competitive advantage for Intel. It also disproved the death of Moore’s Law predictions many times over. The last two technology transitions have signaled that our cadence today is closer to 2.5 years than two.

To address this cadence, in the second half of 2016 we plan to introduce a third 14-nanometer product, code named Kaby Lake, built on the foundations of the Skylake micro-architecture but with key performance enhancements. Then in the second half of 2017, we expect to launch our first 10-nanometer product, code named Cannonlake. We expect that this addition to the roadmap will deliver new features and improved performance and pave the way for a smooth transition to 10-nanometers